1. Field of the Invention
The present invention relates to a memory, and more particularly, to a method of improving an error checking and correction performance of a memory.
2. Discussion of Related Art
As an integration degree of memory becomes higher, a rate of soft errors becomes increased. To solve this problem, high importance has been placed on error correction code (ECC) memories. Soft errors may occur due to electromagnetic interference, static electricity, cosmic rays, etc. Error checking and correction is performed on a memory using error correction code.
To fix an error occurring in a memory, it is necessary to perform error checking and correction, and error correction code for a memory, such as SEC-DED code and SEC-DED-DAEC code, has become an indispensable part for designing a memory.
As integration degrees of memories become higher, a rate of defects occurring in a process becomes increased. In general, spare rows or spare columns are used to fix defective memory cells included in a memory cell array.
FIGS. 1A and 1B are diagrams illustrating a method of replacing a defective column having a defective memory cell of a memory cell array with a spare column of a spare cell array according to the related art.
In FIGS. 1A and 1B, the memory cell array has a 16×2 matrix structure and the spare cell array has a 4×2 matrix structure.
Referring to FIG. 1A, an eleventh memory cell in a first row of the memory cell array and an eighth memory cell in a second row of the memory cell array are defective memory cells and are thus displayed in black. Non-defective memory cells are displayed in white. Spare memory cells of the spare cell array are displayed in gray.
Referring to FIG. 1B, a defective column including the defective memory cell of the first row of the memory cell array is replaced with a fourth spare column of the spare cell array in a row direction, and a defective column including the defective memory cell of the second row of the memory cell array is replaced with a third spare column of the spare cell array in the row direction. In this case, memory cells marked with oblique lines mean memory cells that are neglected to be not used after they are replaced for the defective memory cells. When a defective column is replaced with a spare column, the defective column is neglected to be unavailable. Although memory cells that may operate normally are present in the defective column, the memory cells are not used in relation to memory operations. Thus, a method of replacing a defective column with a spare column according to the related art has a problem that normal memory cells included in the defective column cannot be used.